Performance analysis of RISC-V based cores in a dual-core programmable logic controller
source: Bulletin of the Polish Academy of Sciences Technical Sciences; 2026; 74; 4; e158308
creator: Przechowski, Rafał
issued: 2026 @pl
subject: bit.WORD unit
creator: Korzuch, Blazej
creator: Oles, Fabian
subject: Nauki Techniczne @pl
identifier: ISSN 2300-1917 @pl
subject: RISC-V
subject: Field Programmable Gate Arrays (FPGA)
date: 2026 @pl
creator: Strajer, Oskar
subject: Programmable Logic Controllers (PLC)
creator: Chmiel, Mirosław
type: article
creator: Czerwiński, Robert
creator: Jekot, Bartłomiej
subject: Central Processing Units (CPU)
creator: Lempa, Paweł