@ARTICLE{Mustaqueem_Zeba_Low_2022,
 author={Mustaqueem, Zeba and Ansari, Abdul Quaiyum and Akram, Md Waseem},
 volume={vol. 68},
 number={No 4},
 journal={International Journal of Electronics and Telecommunications},
 pages={667-676},
 howpublished={online},
 year={2022},
 publisher={Polish Academy of Sciences Committee of Electronics and Telecommunications},
 abstract={This work aims to improve the total power dissipation, leakage currents and stability without disturbing the logic state of SRAM cell with concept called sub-threshold operation. Though, sub-threshold SRAM proves to be advantageous but fails with basic 6T SRAM cell during readability and writability. In this paper we have investigated a non-volatile 6T2M (6 Transistors & 2 Memristors) sub-threshold SRAM cell working at lower supply voltage of VDD=0.3V, where Memristor is used to store the information even at power failures and restores previous data with successful read and write operation overcomes the challenge faced. This paper also proposes a new configuration of non-volatile 6T2M (6 Transistors & 2 Memristors) subthreshold SRAM cell resulting in improved behaviour in terms of power, stability and leakage current where read and write power has improved by 40% and 90% respectively when compared to 6T2M (conventional) SRAM cell. The proposed 6T2M SRAM cell offers good stability of RSNM=65mV and WSNM=93mV which is much improved at low voltage when compared to conventional basic 6T SRAM cell, and improved leakage current of 4.92nA is achieved as compared.},
 type={Article},
 title={Low Leakage and Robust Sub-threshold SRAM Cell Using Memristor},
 URL={http://www.czasopisma.pan.pl/Content/125450/PDF/76-3565-Mustaqueem-sk.pdf},
 doi={10.24425/ijet.2022.141287},
 keywords={6T SRAM cell, memristor, power dissipation, read and write operation, leakage current, stability, non-volatile circuit},
}