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Waiting for dark matter to ‘tick’

Beata Zjawin
ACADEMIA. The magazine of the Polish Academy of Sciences | 2017 | Nr 2 (54) 2017 Women | 46-49
Słowa kluczowe dark matter atomic clocks
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Abstrakt

Is dark matter real or just a convenient hypothesis? Although it was first proposed almost a century ago, physicists have yet to uncover its true nature. Scientists from the Nicolaus Copernicus University are investigating the phenomenon using atomic clocks.

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Autorzy i Afiliacje

Beata Zjawin

Progression of clock DBD changes over time

Kamil Maciuk Inese Varna Jacek Kudrys
Metrology and Measurement Systems | 2023 | vol. 30 | No 3 | 499-505 | DOI: 10.24425/mms.2023.146414
Słowa kluczowe GPS satellite clock jump outlier DBD reference clock
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Abstrakt

Day-boundary discontinuity (DBD) is an effect present in precise GNSS satellite orbit and clock products originating from the method used for orbit and clock determination. The non-Gaussian measurement noise and data processing in 24 h batches are responsible for DBDs. In the case of the clock product, DBD is a time jump in the boundary epochs of two adjacent batches of processed data and its magnitude might reach a couple of ns. This article presents the four GNSS (Global Navigation Satellite System) systems DBD analysis in terms of change over an 8 year period. For each of 118 satellites available in this period, the yearly value of DBD was subject to analysis including standard deviation and frequency of outliers. Results show that the smallest DBDs appear in the GPS system, the biggest – for the BeiDou space segment. Moreover, the phenomenon of changes in DBDs over time is clearly seen at the beginning of the analysed period when the magnitude and number of the DBDs were larger than for current, newest clock products
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Autorzy i Afiliacje

Kamil Maciuk
1
ORCID: ORCID
Inese Varna
2
Jacek Kudrys
1
  1. Department of Integrated Geodesy and Cartography, AGH University, Mickiewicza Av. 30, 30-059 Krakow, Poland
  2. Institute of Geodesy and Geoinformatics, University of Latvia, Jelgavas St. 3, LV-1004, Riga, Latvia

An Enhanced IEEE1588 Clock Synchronization for Link Delays Based on a System-on-Chip Platform

Xiaohan Wei Xingzhong Wei Zhongqiang Luo Jianwu Wang Kaixing Cheng
International Journal of Electronics and Telecommunications | 2021 | vol. 67 | No 2 | 289-294 | DOI: 10.24425/ijet.2021.135978
Słowa kluczowe IEEE1588 clock synchronization fronthaul TSN System-on-chip
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Abstrakt

The clock synchronization is considered as a key technology in the time-sensitive networking (TSN) of 5G fronthaul. This paper proposes a clock synchronization enhancement method to optimize the link delays, in order to improve synchronization accuracy. First, all the synchronization dates are filtered twice to get the good calculation results in the processor, and then FPGA adjust the timer on the slave side to complete clock synchronization. This method is implemented by Xilinx Zynq UltraScale+ MPSoC (multiprocessor system-on-chip), using FPGA+ARM software and hardware co-design platform. The master and slave output Pulse Per-Second signals (PPS). The synchronization accuracy was evaluated by measuring the time offset between PPS signals. Contraposing the TSN, this paper compares the performance of the proposed scheme with some previous methods to show the efficacy of the proposed work. The results show that the slave clock of proposed method is synchronized with the master clock, leading to better robustness and significant improvement in accuracy, with time offset within the range of 40 nanoseconds. This method can be applied to the time synchronization of the 5G open fronthaul network and meets some special service needs in 5G communication.
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Bibliografia

1] M. Dong, Z. Qiu, W. Pan, C. Chen, J. Zhang and D. Zhang, "The Design and Implementation of IEEE 1588v2 Clock Synchronization System by Generating Hardware Timestamps in MAC Layer," 2018 International Conference on Computer, Information and Telecommunication Systems (CITS), Colmar, 2018, pp. 1-5.
[2] Chavan A., Nagurvalli S., Jain M., Chaudhari S. (2018) Implementation of FPGA-Based Network Synchronization Using IEEE 1588 Precision Time Protocol (PTP). In: Sa P., Bakshi S., Hatzilygeroudis I., Sahoo M. (eds) Recent Findings in Intelligent Computing Techniques. Advances in Intelligent Systems and Computing, vol 708. Springer, Singapore.
[3] R. Exel, T. Bigler and T. Sauter, "Asymmetry Mitigation in IEEE 802.3 Ethernet for High-Accuracy Clock Syn chronization," in IEEE Transactions on Instrumentation and Measurement, vol. 63, no. 3, pp. 729- 736, March 2014.
[4] W. Tseng, S. Siu, S. Lin and C. Liao, "Precise UTC dissemination through future telecom synchronization networks," 2015 Joint Conference of the IEEE International Frequency Control Symposium & the European Frequency and Time Forum, Denver, CO, 2015, pp. 696-699.
[5] O. Ronen and M. Lipinski, "Enhanced synchronization accuracy in IEEE1588," 2015 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS), Beijing, 2015, pp. 76-81.
[6] IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Sys tems," in IEEE Std 1588-2008 (Revision of IEEE Std 1588-2002) , vol., no., pp.1-300, 24 July 2008.
[7] Eleftherios Kyriakakis, Jens Sparsø, and Martin Schoeberl. 2018. Hardware Assisted Clock Synchronization with the IEEE 1588-2008 Precision Time Protocol. In Proceedings of the 26th International Conference on Real-Time Networks and Systems (RTNS ’18). Association for Computing Machinery, New York, NY, USA, 51–60.
[8] W.Jinqi, C.Hong, "Implementation of IEEE1588 Precision Clock Synchronization Protocol Based on ARM",2019,42(06):1527-1531.
[9] G. Giorgi and C. Narduzzi, "Performance Analysis of Kalman-Filter- Based Clock Synchronization in IEEE 1588 Networks," in IEEE Transactions on Instrumentation and Measurement, vol. 60, no. 8, pp. 2902-2909, Aug. 2011.
[10] Lee S. An enhanced IEEE 1588 time synchronization algorithm for asymmetric communication link using block burst transmission[J]. IEEE communications letters, 2008, 12(9): 687-689.
[11] Chen, W., Sun, J., Zhang, L. et al. An implementation of IEEE 1588 protocol for IEEE 802.11 WLAN. Wireless Netw 21, 2069–2085 (2015).
[12] P. A. Crossley, H. Guo and Z. Ma, "Time synchronization for transmission substations using GPS and IEEE 1588," in CSEE Journal of Power and Energy Systems, vol. 2, no. 3, pp. 91-99, Sept. 2016.
[13] H. Guo and P. Crossley, "Design of a Time Synchronization System Based on GPS and IEEE 1588 for Transmission Substa tions," in IEEE Transactions on Power Delivery, vol. 32, no. 4, pp. 2091-2100, Aug. 2017.
[14] O. Seijo, I. Val, J. A. Lopez-Fernandez and M. Velez, "IEEE 1588 Clock Synchronization Performance over Time-Varying Wireless Channels," 2018 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control, and Communication (ISPCS), Geneva, 2018, pp. 1-6.
[15] S. Lee and C. Hong, "An Accuracy Enhanced IEEE 1588 Synchronization Protocol for Dynamically Changing and Asymmetric Wireless Links," IEEE Communications Letters, vol. 16, no. 2, pp. 190-192, February 2012.
[16] The Linux PTP Project. [Online]. Available: http://linuxptp.sourceforge.net/, accessed Dec. 2015.
[17] N. Moreira, J. Lázaro, U. Bidarte, J. Jimenez, and A.Astarloa, "On the Utilization of System-on-Chip Platformsto Achieve Nanosecond Synchronization Accuracies in Substation Automation Systems."
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Autorzy i Afiliacje

Xiaohan Wei
1
Xingzhong Wei
1
Zhongqiang Luo
1
Jianwu Wang
1
Kaixing Cheng
1
  1. School of Automation and Information Engineering and Artificial Intelligence Key Laboratory of Sichuan Province, Sichuan University of Science and Engineering, Yibin, China

Influence of the GMDH Neural Network Data Preparation Method on UTC(PL) Correction Prediction Results

Wiesław Miczulski Łukasz Sobolewski
Metrology and Measurement Systems | 2012 | No 1 | 123-132 | DOI: 10.2478/v10178-012-0011-1
Słowa kluczowe GMDH neural network national timescale atomic clock time series analysis
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Abstrakt

The article presents results of the influence of the GMDH (Group Method of Data Handling) neural network input data preparation method on the results of predicting corrections for the Polish timescale UTC(PL). Prediction of corrections was carried out using two methods, time series analysis and regression. As appropriate to these methods, the input data was prepared based on two time series, ts1 and ts2. The implemented research concerned the designation of the prediction errors on certain days of the forecast and the influence of the quantity of data on the prediction error. The obtained results indicate that in the case of the GMDH neural network the best quality of forecasting for UTC(PL) can be obtained using the time-series analysis method. The prediction errors obtained did not exceed the value of ± 8 ns, which confirms the possibility of maintaining the Polish timescale at a high level of compliance with the UTC.

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Autorzy i Afiliacje

Wiesław Miczulski
Łukasz Sobolewski

Efficient frequency jumps detection algorithm for atomic clock comparisons

Michał Marszalec Marzenna Lusawa Tomasz Osuch
Metrology and Measurement Systems | 2021 | vol. 28 | No 1 | 107-121 | DOI: 10.24425/mms.2021.135996
Słowa kluczowe time interval phasetime frequency jump ensemble time scale atomic clock
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Abstrakt

In this paper a new method of frequency jumps detection in data from atomic clock comparisons is proposed. The presented approach is based on histogram analysis for different time intervals averaging phasetime data recorded over a certain period of time. Our method allows identification of multiple frequency jumps for long data series as well to almost real-time jump detection in combination with advanced filtering. Several methods of preliminary data processing have been tested (simple averaging, moving average and Vondrak filtration), to achieve flexibility in adjusting the algorithm parameters for current needs which is the key to its use in determining ensemble time scale or to control systems of physical time scales, such as UTC(PL). The best results have been achieved with the Vondrak filter.
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Autorzy i Afiliacje

Michał Marszalec
1
Marzenna Lusawa
1
Tomasz Osuch
1 2
  1. National Institute of Telecommunications, Szachowa 1, 94-894 Warsaw, Poland
  2. Warsaw University of Technology, Faculty of Electronics and Information Technology, Institute of Electronic Systems, Nowowiejska 15/19, 00-665 Warsaw, Poland

Endogenous carbon monoxide (CO) as a modulating factor of molecular biological clock in the hypothalamic structures involved in light transmission in pig and wild boar hybrid during long and short day season

P. Gilun M. Koziorowska-Gilun B. Wąsowska M. Sowa-Kućma K. Kozioł M. Romerowicz-Misielak W. Kordan M. Koziorowski
Polish Journal of Veterinary Sciences | 2023 | vol. 26 | No 1 | 65-82 | DOI: 10.24425/pjvs.2023.145008
Słowa kluczowe carbon monoxide humoral pathway light master biological clock seasonal
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Abstrakt

Mature males of a wild boar-pig crossbreed, during the long and short day season, were used for the study which demonstrates that the chemical light carrier CO regulates the expression of biological clock genes in the hypothalamus via humoral pathways. Autologous blood with experimentally elevated concentrations of endogenous CO (using lamps with white light-emitting diodes) was infused into the ophthalmic venous sinus via the right dorsal nasal vein. Molecular biology methods: qPCR and Western Blot were used to determine the expression of genes and biological clock proteins. The results showed that elevated endogenous CO levels, through blood irradiation, induces changes in genes expression involved in the functioning of the main biological clock located in suprachiasmatic nuclei. Changes in the expression of the transcription factors Bmal1, Clock and Npas2 have a similar pattern in both structures, where a very large decrease in gene expression was shown after exposure to elevated endogenous CO levels. The changes in the gene expression of PER 1-2, CRY 1-2, and REV-ERB α-β and ROR β are not the same for both POA and DH hypothalamic structures, indicating that both structures respond differently to the humoral signal received.
The results indicate that CO is a chemical light molecule whose production in an organism depends on the amount of light. An adequate amount of light is an essential factor for the proper functioning of the main biological clock.
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Autorzy i Afiliacje

P. Gilun
1
M. Koziorowska-Gilun
2
B. Wąsowska
1
M. Sowa-Kućma
3
K. Kozioł
4
M. Romerowicz-Misielak
4
W. Kordan
2
M. Koziorowski
4
  1. Department of Local Physiological Regulations, Institute of Animal Reproduction and Food Research of the Polish Academy of Sciences in Olsztyn, Tuwima 10, 10-748, Olsztyn, Poland
  2. Department of Animal Biochemistry and Biotechnology, Faculty of Animal Bioengineering, University of Warmia and Mazury, Oczapowskiego 5, 10-719 Olsztyn, Poland
  3. Department of Human Physiology, Institute of Medical Sciences, Medical College of Rzeszow University, Kopisto 2a, Rzeszow, 35-959, Poland
  4. Department of Animal Physiology and Reproduction, Institute of Biology and Biotechnology, Collegium Scientarium Naturalium, University of Rzeszow, Werynia 502, 36-100 Kolbuszowa, Poland

Sampling Jitter in Audio A/D Converters

Zbigniew Kulka
Archives of Acoustics | 2011 | vol. 36 | No 4 | 831-849 | DOI: 10.2478/v10168-011-0055-3
Słowa kluczowe analog-to-digital converter (ADC) successive approximation register (SAR) ADC sigma-delta (ΣΔ) ADC sample-and-hold circuit DT ΣΔ modulator CT ΣΔ modulator time jitter aperture jitter clock jitter periodic clock jitter signal-to-noise ratio (SNR)
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Abstrakt

This paper provides an overview of the effects of timing jitter in audio sampling analog-to-digital converters (ADCs), i.e. PCM (conventional or Nyquist sampling) ADCs and sigma-delta (ΣΔ) ADCs. Jitter in a digital audio is often defined as short-term fluctuations of the sampling instants of a digital signal from their ideal positions in time. The influence of the jitter increases particularly with the improvements in both resolution and sampling rate of today's audio ADCs. At higher frequencies of the input signals the sampling jitter becomes a dominant factor in limiting the ADCs performance in terms of signal-to-noise ratio (SNR) and dynamic range (DR).

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Autorzy i Afiliacje

Zbigniew Kulka

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