A low drop-out [LDO] voltage regulator with fast transient response which does not require a capacitor for proper operation is proposed in this paper. Recent cap-less LDOs do not use off chip capacitor but instead they use on chip capacitor which occupy a large area on the chip. In the proposed LDO, this on chip capacitor is also avoided. A novel secondary local feedback technique is introduced which helps to achieve a good transient response even in the absence of output capacitor. Further an error amplifier that does need compensation capacitor is selected to reduce the on chip area. Stability analysis shows that the proposed LDO is stable with a phase margin of 78°. The proposed LDO is laid out using Cadence Virtuoso in 180 nm standard CMOS technology. Post layout simulation is carried out and LDO gives 6mV=V and 360µV=mA line and load regulation respectively. An undershoot of 120 mV is observed during the load transition from 0 mA to 50 mA in 1 µs transition time, however LDO is able to recover within 1:4 µs. Since capacitor is not required in any part of design, it occupies only 0:010824 mm2 area on the chip.

In this paper, an automatic voltage regulator (AVR) embedded with fractional order PID (FOPID) is employed for the alternator terminal voltage control. A novel meta-heuristic technique, a modified version of grey wolf optimizer (mGWO) is proposed to design and optimize the FOPID AVR system. The parameters of FOPID, namely, proportional gain ( Κ _Ρ), the integral gain ( Κ _I), the derivative gain ( Κ _D), λ and μ have been optimally tuned with the proposed mGWO technique using a novel fitness function. The initial values of the Κ _Ρ, Κ _I , and Κ _D of the FOPID controller are obtained using Ziegler-Nichols (ZN) method, whereas the initial values of λ and μ have been chosen as arbitrary values. The proposed algorithm offers more benefits such as easy implementation, fast convergence characteristics, and excellent computational ability for the optimization of functions with more than three variables. Additionally, the hasty tuning of FOPID controller parameters gives a high-quality result, and the proposed controller also improves the robustness of the system during uncertainties in the parameters. The quality of the simulated result of the proposed controller has been validatedby other state-of-the-art techniques in the literature.

When the machine is at high speed, serious problems occur, such as high frequency loss, difficult thermal management, and the rotor structural strength insufficiency. In this paper, the performances of two high-speed permanent magnet generators (HSP- MGs) with different rotational speeds and the same torque are compared and analyzed. The two-dimensional finite element model (FEM) of the 117 kW, 60 000 rpm HSPMG is established. By comparing a calculation result and test data, the accuracy of the model is verified. On this basis, the 40 kW, 20 000 rpm HSPMG is designed and the FEM is established. The relationship between the voltage regulation sensitivity and power factor of the two HSPMGs is determined. The influence mechanism of the voltage regulation sensitivity is further revealed. In addition, the air-gap flux density is decomposed by the Fourier transform principle, and the influence degree of different harmonic orders on the HSPMG performance is determined. The method to reduce the harmonic content is further proposed. Finally, the method to improve the HSPMG overload capacity is obtained by studying the maximum power. The research showed that the HSPMG at low speed (20 000 rpm) has high sensitivity of the voltage regulation, while the HSPMG at high speed (60 000 rpm) is superior to the HSPMG at low speed in reducing the harmonic content and increasing the overload capacity.

This study introduces a robust strategy for regulating output voltage in the presence of false data injection (FDI) attacks. Employing a hierarchical approach, we disentangle the distributed secondary control problem into two distinct facets: an observer-based resilient tracking control problem and a decentralized control problem tailored for real systems. Notably, our strategy eliminates the reliance on global information and effectively mitigates the impact of FDI attacks on directed communication networks. Ultimately, simulation results corroborate the efficacy of our approach, demonstrating successful voltage regulation within the system and proficient management of FDI attacks.

The paper presents a concept of a control system for a high-frequency three-phase PWM grid-tied converter (3x400 V / 50 Hz) that performs functions of a 10-kW DC power supply with voltage range of 600÷800 V and of a reactive power compensator. Simulation tests (in PLECS) allowed proper selection of semiconductor switches between fast IGBTs and silicon carbide MOSFETs. As the main criterion minimum amount of power losses in semiconductor devices was adopted. Switching frequency of at least 40 kHz was used with the aim of minimizing size of passive filters (chokes, capacitors) both on the AC side and on the DC side. Simulation results have been confirmed in experimental studies of the PWM converter, the power factor of which (inductive and capacitive) could be regulated in range from 0.7 to 1.0 with THDi of line currents below 5% and energy efficiency of approximately 98.5%. The control system was implemented in Texas Instruments TMS320F28377S microcontroller.