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Number of results: 9
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Abstract

The paper describes second order generalized integrator (sogi) which is specialized in band-pass filtering and orthogonalization of periodic signals. Modifications of the structure and the influence of parameters on the system performance is described. The article highlights the particular importance of model discretization method in the practical implementation, as well as reviews estimation methods of the: amplitude, frequency, offset and phase angle of the periodic signal. Examples of simulation and experimental results are presented.
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Authors and Affiliations

Kamil Możdżyński
Krzysztof Rafał
Małgorzata Bobrowska-Rafał
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Abstract

Real-time data processing systems utilize Digital Signal Processing (DSP) functions as the base modules. Most of the DSP functions involve the implementation of Fast Fourier Transform (FFT) to convert the signals from one domain to another domain. The major bottleneck of Decimation in frequency- Fast Fourier Transform (DIF-FFT) implementation lies in using a number of Multipliers. Distributed arithmetic (DA) is considered as one of the efficient techniques to implement DIF-FFT. In this approach, the multipliers are not used. The proposed technique exploits the very advantage of the look-up table by storing the Twiddle factors, thereby avoiding the multipliers required in the butterfly structure. DIF-FFT using Distributed Arithmetic (DIF-FFT DA) models, with different adders such as Ripple carry adder (RCA), Carry-lookahead adder (CLA), and Sklansky prefix graph adder, are proposed in this paper. The three proposed models are synthesized using Cadence 6.1 EDA tools with a 45nm CMOS technology. Compared to the traditional method, it is observed that the area is improved by 53.11%, 53.35%, and 50.15%, power is improved by 42.31%, 42.52%, and 40.39%, and delay is improved by 45.26%, 45.42%, 41.80%, respectively.
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Bibliography

[1] H. Kim and S. Lekcharoen, “A cooley-tukey modified algorithm in fast fourier transform,” The Korean Journal of Mathematics, vol. 19, no. 3, 2011.
[2] J. Watson, “Digital signal processing: Principles, devices and applications.” Institution of Electrical Engineers, 1990.
[3] B. Mohindroo, A. Paliwal, and K. Suneja, “Fpga based faster implementation of mac unit in residual number system,” in 2020 International Conference for Emerging Technology (INCET). IEEE, 2020, pp. 1–4.
[4] R. Gonzalez-Toral, P. Reviriego, J. A. Maestro, and Z. Gao, “A scheme to design concurrent error detection techniques for the fast fourier transform implemented in sram-based fpgas,” IEEE Transactions on Computers, vol. 67, no. 7, pp. 1039–1045, 2018.
[5] K. K. Parhi, VLSI digital signal processing systems: design and implementation. John Wiley & Sons, 2007.
[6] D. Deepak and R. D. Kiran, “Hardware implementation of discrete cosine transform,” 2002.
[7] R. Guo and L. S. DeBrunner, “A novel adaptive filter implementation scheme using distributed arithmetic,” in 2011 Conference Record of the Forty Fifth Asilomar Conference on Signals, Systems and Computers (ASILOMAR). IEEE, 2011, pp. 160–164.
[8] S. Patel, “Design and implementation of 31-order fir low-pass filter using modified distributed arithmetic based on fpga,” International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, vol. 2, no. 10, pp. 650–656, 2013.
[9] S. Venkatachalam and S.-B. Ko, “Approximate sum-of-products designs based on distributed arithmetic,” IEEE Transactions on very large scale integration (VLSI) systems, vol. 26, no. 8, pp. 1604–1608, 2018.
[10] K. N. Bowlyn and N. M. Botros, “A novel distributed arithmetic multiplierless approach for computing complex inner products,” in Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA). The Steering Committee of The World Congress in Computer Science, Computer , 2015, p. 606.
[11] E. E. Swartzlander and C. E. Lemonds, Computer Arithmetic: Volume III. World Scientific, 2015.
[12] K. Vitoroulis and A. J. Al-Khalili, “Performance of parallel prefix adders implemented with fpga technology,” in 2007 IEEE Northeast Workshop on Circuits and Systems. IEEE, 2007, pp. 498–501.
[13] A. K. Y. Reddy and S. P. Kumar, “Performance analysis of 8-point fft using approximate radix-8 booth multiplier,” in 2018 3rd International Conference on Communication and Electronics Systems (ICCES). IEEE, 2018, pp. 42–45.
[14] A. Ajay and R. M. Lourde, “Vlsi implementation of an improved multiplier for fft computation in biomedical applications,” in 2015 IEEE Computer Society Annual Symposium on VLSI. IEEE, 2015, pp. 68–73.
[15] N. M. Sk et al., “Multi-mode parallel and folded vlsi architectures for 1d-fast fourier transform,” Integration, vol. 55, pp. 43–56, 2016.
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Authors and Affiliations

Kusma Kumari Cheepurupalli
1
Muntha Charan
1
Jammu Bhaskara Rao
1
Mahammad S. Noor
1

  1. Dept. of ECE, Gayatri Vidya Parishad College of Engineering, India
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Abstract

Infrared detectors are usually characterized by 1/f noise when operating with biasing. This type of noise significantly reduces detection capabilities for low-level and slow signals. There are a few methods to reduce the influence of 1/f noise, like filtering or chopper stabilization with lock-in. Using the first one, a simple 1st-order analog low-pass filter built-in amplifier usually cuts off 1/f noise fluctuations at low frequencies. In comparison, the stabilization technique modulates the signal transposing to a higher frequency with no 1/f noise and then demodulates it back (lock-in amplifiers). However, the flexible tuned device, which can work precisely at low frequencies, is especially desirable in some applications, e.g., optical spectroscopy or interferometry. The paper describes a proof-of-concept of an IR detection module with an adjustable digital filter taking advantage of finite impulse response type. It is based on the high-resolution analog-to-digital converter, field-programmable gate array, and digital-to-analog converter. A microcontroller with an implemented user interface ensures control of such a prepared filtering path. The module is a separate component with the possibility of customization and can be used in experiments or applications in which the reduction of noises and unexpected interferences is needed.
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Authors and Affiliations

Krzysztof Achtenberg
1
ORCID: ORCID
Janusz Mikołajczyk
1
ORCID: ORCID
Zbigniew Bielecki
1
ORCID: ORCID

  1. Institute of Optoelectronics, Military University of Technology, Warsaw, Poland
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Abstract

In a massive multiple-input multiple-output (MIMO) system, a large number of receiving antennas at the base station can simultaneously serve multiple users. Linear detectors can achieve optimal performance but require large dimensional matrix inversion, which requires a large number of arithmetic operations. Several low complexity solutions are reported in the literature. In this work, we have presented an improved two-dimensional double successive projection (I2D-DSP) algorithm for massive MIMO detection. Simulation results show that the proposed detector performs better than the conventional 2D-DSP algorithm at a lower complexity. The performance under channel correlation also improves with the I2D-DSP scheme. We further developed a soft information generation algorithm to reduce the number of magnitude comparisons. The proposed soft symbol generation method uses real domain operation and can reduce almost 90% flops and magnitude comparisons.
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Authors and Affiliations

Sourav Chakraborty
1
Nirmalendu Bikas Sinha
2
Monojit Mitra
3

  1. Department of Electronics and Communication Engineering, Cooch Behar Government Engineering College, Coochbehar,India
  2. Principal, Maharaja Nandakumar Mahavidyalaya, Purba Medinipore, India
  3. Department of Electronics and Telecommunication, Engineering, IIEST Shibpur, Howrah, India
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Abstract

The work presents the results of experimental study on the possibilities of determining the source of an ultrasonic signal in two-dimensional space (distance, horizontal angle). During the research the team used a self-constructed linear array of MEMS microphones. Knowledge in the field of sonar systems was utilized to analyse and design a location system based on a microphone array. Using the above mentioned transducers and broadband ultrasound sources allows a quantitative comparison of estimation of the location of an ultrasonic wave source with the use of broadband modulated signals (modelled on bats' echolocation signals) to be performed. During the laboratory research the team used various signal processing algorithms, which made it possible to select an optimal processing strategy, where the sending signal is known.

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Authors and Affiliations

Krzysztof Herman
Tadeusz Gudra
Joanna Furmankiewicz
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Abstract

A prototype of a DSP-based instrument for in-service transmitter power measurements is presented. The instrument implements a signal-selective algorithm for power measurements that is suitable for use in wireless environments, where possible uncontrolled interfering sources are present in the radio channel and are overlapped to the signal emitted by the transmitter under test, possibly in both time and frequency domain. The measurement method exploits the principles of cyclic spectral analysis, which are briefly recalled in the paper. Potentialities, as well as limitations of the prototype use are discussed, and the results of experiments with both modulated and unmodulated interfering sources are presented.

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Authors and Affiliations

Leopoldo Angrisani
Felice Cennamo
Giovanni Scarpato
Rosario Schiano Lo Moriello
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Abstract

The work presents a structural and functional model of a distributed low level radio frequency (LLRF) control, diagnostic and telemetric system for a large industrial object. An example of system implementation is the European TESLA-XFEL accelerator. The free electron laser is expected to work in the VUV region now and in the range of X-rays in the future. The design of a system based on the FPGA circuits and multi-gigabit optical network is discussed. The system design approach is fully parametric. The major emphasis is put on the methods of the functional and hardware concentration to use fully both: a very big transmission capacity of the optical fiber telemetric channels and very big processing power of the latest series of DSP/PC enhanced and optical I/O equipped, FPGA chips. The subject of the work is the design of a universal, laboratory module of the LLRF sub-system. The current parameters of the system model, under the design, are presented. The considerations are shown on the background of the system application in the hostile industrial environment. The work is a digest of a few development threads of the hybrid, optoelectronic, telemetric networks (HOTN). In particular, the outline of construction theory of HOTN node was presented as well as the technology of complex, modular, multilayer HOTN system PCBs. The PCBs contain critical sub-systems of the node and the network. The presented exemplary sub-systems are: fast optical data transmission of 2.5 Gbit/s, 3.125 Gbit/s and 10 Gbit/s; fast A/C and C/A multichannel data conversion managed by FPGA chip (40 MHz, 65 MHz, 105 MHz), data and functionality concentration, integration of floating point calculations in the DSP units of FPGA circuit, using now discrete and next integrated PC chip with embedded OS; optical distributed timing system of phase reference; and 1GbEth video interface (over UTP or FX) for CCD telemetry and monitoring. The data and functions concentration in the HOTN node is necessary to make efficient use of the multigigabit optical fiber transmission and increasing the processing power of the FPGA/DSP/PC chips with optical I/O interfaces. The experiences with the development of the new generation of HOTN node based on the new technologies of data and functions concentration are extremely promising, because such systems are less expensive and require less labour.

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Authors and Affiliations

R.S. Romaniuk
K.T. Poźniak
T. Czarski
K. Czuba
W. Giergusiewicz
G. Kasprowicz
W. Koprek
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Abstract

This work present an efficient hardware architecture of Support Vector Machine (SVM) for the classification of Hyperspectral remotely sensed data using High Level Synthesis (HLS) method. The high classification time and power consumption in traditional classification of remotely sensed data is the main motivation for this work. Therefore presented work helps to classify the remotely sensed data in real-time and to take immediate action during the natural disaster. An embedded based SVM is designed and implemented on Zynq SoC for classification of hyperspectral images. The data set of remotely sensed data are tested on different platforms and the performance is compared with existing works. Novelty in our proposed work is extend the HLS based FPGA implantation to the onboard classification system in remote sensing. The experimental results for selected data set from different class shows that our architecture on Zynq 7000 implementation generates a delay of 11.26 μs and power consumption of 1.7 Watts, which is extremely better as compared to other Field Programmable Gate Array (FPGA) implementation using Hardware description Language (HDL) and Central Processing Unit (CPU) implementation.
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Authors and Affiliations

H.N. Mahendra
1
S. Mallikarjunaswamy
1

  1. Department of Electronics and Communication Engineering, JSS Academy of Technical Education Bengaluru and Affiliated to Visvesvaraya Technological University, Belagavi, India
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Abstract

Advancement in medical technology creates some issues related to data transmission as well as storage. In real-time processing, it is too tedious to limit the flow of data as it may reduce the meaningful information too. So, an efficient technique is required to compress the data. This problem arises in Magnetic Resonance Imaging (MRI), Electrocardiogram (ECG), Electroencephalogram (EEG), and other medical signal processing domains. In this paper, we demonstrate Block Sparse Bayesian Learning (BSBL) based compressive sensing technique on an Electroencephalogram (EEG) signal. The efficiency of the algorithm is described using the Mean Square Error (MSE) and Structural Similarity Index Measure (SSIM) value. Apart from this analysis we also use different combinations of sensing matrices too, to demonstrate the effect of sensing matrices on MSE and SSIM value. And here we got that the exponential and chi-square random matrices as a sensing matrix are showing a significant change in the value of MSE and SSIM. So, in real-time body sensor networks, this scheme will contribute a significant reduction in power requirement due to its data compression ability as well as it will reduce the cost and the size of the device used for real-time monitoring.
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Bibliography

[1] Zou, Xiuming, Lei Feng, and Huaijiang Sun. "Compressive Sensing of Multichannel EEG Signals Based on Graph Fourier Transform and Cosparsity." Neural Processing Letters (2019): 1-10.
[2] Tayyib, Muhammad, Muhammad Amir, Umer Javed, M. Waseem Akram, Mussyab Yousufi, Ijaz M. Qureshi, Suheel Abdullah, and Hayat Ullah. "Accelerated sparsity-based reconstruction of compressively sensed multichannel EEG signals." PLoS One 15, no. 1 (2020): e0225397.
[3] Şenay, Seda, Luis F. Chaparro, Mingui Sun, and Robert J. Sclabassi. "Compressive sensing and random filtering of EEG signals using Slepian basis." In 2008 16th European Signal Processing Conference, pp. 1-5. IEEE, 2008.
[4] Gurve, Dharmendra, Denis Delisle-Rodriguez, Teodiano Bastos-Filho, and Sridhar Krishnan. "Trends in Compressive Sensing for EEG Signal Processing Applications." Sensors 20, no. 13 (2020): 3703.
[5] Amezquita-Sanchez, Juan P., Nadia Mammone, Francesco C. Morabito, Silvia Marino, and Hojjat Adeli. "A novel methodology for automated differential diagnosis of mild cognitive impairment and the Alzheimer’s disease using EEG signals." Journal of Neuroscience Methods 322 (2019): 88-95.
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[7] A. Einstein, B. Podolsky, N. Rosen, 1935, “Can quantum-mechanical description of physical reality be considered complete?”, Phys. Rev. 47, 777-780.
[8] R. G. Baraniuk, "Compressive sensing, IEEE Signal Proc." Mag 24, no. 4 (2007): 118-120.
[9] Upadhyaya, Vivek, and Mohammad Salim. "Basis & Sensing Matrix as key effecting Parameters for Compressive Sensing." In 2018 International Conference on Advanced Computation and Telecommunication (ICACAT), pp. 1-6. IEEE, 2018.
[10] E. Candes, “Compressive sampling”, In Proc. Int. Congress of Math., Madrid, Spain, Aug. 2006.
[11] E. Candes, J. Romberg, “Quantitative robust uncertainty principles and optimally sparse decompositions”, Found. Compute. Math., 6(2): 227-254, 2006.
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[17] Zhang, Zhilin, Tzyy-Ping Jung, Scott Makeig, Bhaskar D. Rao. "Compressed sensing for energy-efficient wireless telemonitoring of noninvasive fetal ECG via block sparse Bayesian learning." IEEE Transactions on Biomedical Engineering 60, no. 2 (2012): 300-309.
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[19] Joshi, Amit Mahesh, Vivek Upadhyaya. "Analysis of compressive sensing for non-stationary music signal." In 2016 International Conference on Advances in Computing, Communications, and Informatics (ICACCI), pp. 1172-1176. IEEE, 2016.
[20] Wang, Zhou, Alan C. Bovik, Hamid R. Sheikh, Eero P. Simoncelli. "Image quality assessment: from error visibility to structural similarity." IEEE transactions on image processing 13, no. 4 (2004): 600-612.
[21] Nibheriya, Khushboo, Vivek Upadhyaya, Ashok Kumar Kajla. "To Analysis the Effects of Compressive Sensing on Music Signal with variation in Basis & Sensing Matrix." In 2018 Second International Conference on Electronics, Communication and Aerospace Technology (ICECA), pp. 1121-1126. IEEE, 2018.
[22] Zhang, Zhilin, Tzyy-Ping Jung, Scott Makeig, and Bhaskar D. Rao. "Compressed sensing of EEG for wireless telemonitoring with low energy consumption and inexpensive hardware." IEEE Transactions on Biomedical Engineering 60, no. 1 (2012): 221-224.
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Authors and Affiliations

Vivek Upadhyaya
1
ORCID: ORCID
Mohammad Salim
1

  1. Malaviya National Institute of Technology, India

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