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Abstract

This paper is focused on multiple soft fault diagnosis of linear time-invariant analog circuits and brings a method that achieves all objectives of the fault diagnosis: detection, location, and identification. The method is based on a diagnostic test arranged in the transient state, which requires one node accessible for excitation and two nodes accessible for measurement. The circuit is specified by two transmittances which express the Laplace transform of the output voltages in terms of the Laplace transform of the input voltage. Each of these relationships is used to create an overdetermined system of nonlinear algebraic equations with the circuit parameters as the unknown variables. An iterative method is developed to solve these equations. Some virtual solutions can be eliminated comparing the results obtained using both transmittances. Three examples are provided where laboratory or numerical experiments reveal effectiveness of the proposed method.
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Bibliography

[1] D. Gizopoulos, Advances in electronic testing. Challenges and methodologies. (Springer, Dordrecht, 2006)
[2] P. Kabisatpathy, A. Barua and S. Sinha, Fault diagnosis of analog integrated circuits. (Springer, Dordrecht, 2005).
[3] Y. Sun (ed.), Test and diagnosis of analog mixed-signal and RF integrated circuits: the system on chip approach, (IET Digital Library, UK, 2008)
[4] D. Binu, B.S. Kariyappa, “A survey on fault diagnosis of analog circuits: Taxonomy and state of the art”, Int. J. Electron. Commun. (AEÜ), vol. 73, pp. 68-83, 2017. doi: 10.1016/j.aeue.2017.01.002.
[5] Z. Czaja, “Using a square-wave signal for fault diagnosis of analog parts of mixed-signal electronic embedded systems”, IEEE Trans. Instrum. Meas., vol. 57, pp. 1589-1595, 2008. doi: 10.1109/TIM.2008.925342
[6] H. Han, H. Wang, S. Tian, N. Zhang, “A new analog circuit fault diagnosis method based on improved Mahalanobis distance”, J. Electron. Test., vol. 29, pp. 95–102, 2013. https://doi.org/10.1007/s10836-012- 5342-z.
[7] Ch. Yang, S. Tian, B. Long, F. Chen, “Methods of handling the tolerance and test-point selection problem for analog-circuit fault diagnosis”, IEEE Trans. Instrum. Means., vol. 60, pp. 176-185, 2011. doi: 10.1109/TIM.2010.2050356
[8] Q.Z. Zhou, Y.L. Xie, X.F. Li, D.J. Bi, X. Xie, S.S. Xie, “Methodology and equipments for analog circuit parametric faults diagnosis based on matrix eigenvalues”, IEEE Trans. Appl. Superconductivity, vol. 24, pp. 1–6, 2014. https://doi.org/10.1109/TASC.2014.2340447.
[9] Y. Deng, Y. N. Liu, “Soft fault diagnosis in analog circuits based on bispectral models”, J. Electron. Test., vol. 33, pp. 543-557, 2017. https://doi.org/10.1007/s10836-017-5686-5.
[10] S. Djordjevic, M.T. Pesic, “A fault verification method based on the substitution theorem and voltage-current phase relationship”, J. Electron. Test., vol. 36, pp. 617-629, 2020. https://doi.org/10.1007/s10836-020- 05901-5.
[11] T. Gao, J. Yang, S. Jiang, “A novel incipient fault diagnosis method for analog circuits based on GMKL-SVM and wavelet fusion feature”. IEEE Trans. Instrum. Meas., vol. 70, 2021. https://doi.org/10.1109/TIM.2020.3024337.
[12] Y. Li, R. Zhang, Y. Guo, P. Huan, M. Zhang, “Nonlinear soft fault diagnosis of analog circuits based on RCCA-SVM”, IEEE Access., vol. 8, pp. 60951-60963, 2020. doi.org/10.1109/ACCESS.2020.2982246.
[13] M. Tadeusiewicz, S. Hałgas, “A new approach to multiple soft fault diagnosis of analog BJT and CMOS circuits”, IEEE Trans. Instrum. Meas., vol. 64, pp. 2688–2695, 2015. https://doi.org/10.1109/TIM.2015.2421712.
[14] M. Tadeusiewicz, S. Hałgas, “A method for local parametric fault diagnosis of a broad class of analog integrated circuits”, IEEE Trans. Instrum. Meas., vol. 67, pp. 328–337, 2018. https://doi.org/10.1109/TIM.2017.2775438.
[15] Y. Xie, X. Li, S. Xie, X. Xie, Q. Zhou, “Soft fault diagnosis of analog circuits via frequency response function measurements”, J. Electron. Test., vol. 30, pp. 243–249, 2014. https://doi.org/10.1007/s10836-014- 5445-9.
[16] M. Tadeusiewicz, S. Hałgas, M. Korzybski, “An algorithm for soft-fault diagnosis of linear and nonlinear circuits”, IEEE Trans. Circ. Syst.-I., vol. 49, pp. 1648-1653, 2002. doi: 10.1109/TCSI.2002.804596.
[17] M. Tadeusiewicz, S. Hałgas, “Soft fault diagnosis of linear circuits with the special attention paid to the circuits containing current conveyors”, Int. J. Electron Commun. (AEÜ), vol. 115, 2020. https://doi.org/10.1016/j.aeue.2019.153036.
[18] M. Tadeusiewicz and S. Hałgas, “A method for multiple soft fault diagnosis of linear analog circuits”, Measurement, vol. 131, pp. 714-722, 2019. doi: 10.1016/j.measurement.2018.09.001.
[19] M. Jahangiri, F. Razaghian, “Fault detection in analogue circuit using hybrid evolutionary algorithm and neural network”, Analog Int. Cir. Sig. Proc., vol. 80, pp. 551-556, 2014. https://doi.org/10.1007/s10470-014- 0352-7
[20] P. Jantos, D. Grzechca, J. Rutkowski, “Evolutionary algorithms for global parametric fault diagnosis in analogue integrated circuits”, Bull. Polish Acad. Scien., vol. 60, pp. 133-142, 2012. doi: 10.2478/v10175- 012-0019-4
[21] C. Yang, “Multiple soft fault diagnosis of analog filter circuit based on genetic algorithm”, IEEE Access., vol. 8, pp. 8193-8201, 2020. https://doi.org/10.1109/ACCESS.2020.2964054.
[22] D. Grzechca, “Soft fault clustering in analog electronic circuits with the use of self organizing neural network”, Metrol Meas Syst., vol. 8, pp. 555–568, 2011. doi: 10.2478/v10178-011-0054-8
[23] B. Long, M. Li, H. Wang, S. Tian, “Diagnostics of analog circuits based on LS-SVM using time-domain features”, Circuits Syst. Signal. Process., vol. 32, pp. 2683-2706, 2013. https://doi.org/10.1007/s00034-013-9614-3
[24] R. Sałat, S, Osowski, “Support Vector Machine for soft fault location in electrical circuits”, J. Intelligent Fuzzy Systems., vol. 22, pp. 21-31, 2011. doi: 10.3233/IFS-2010-0471.
[25] D. Grzechca, “Construction of an expert system based on fuzzy logic for diagnosis of analog electronic circuits”, Int. Journal of Electronic and Telecomunications, vol. 61, pp. 77-82, 2015. doi: 10.1515/eletel-2015- 0010
[26] P. Bilski, “Analysis of the ensemble of regression algorithms for the analog circuit parametric identification”, Measurement, vol. 170, pp. 503–514, 2020. https://doi.org/10.1016/j.measurement.2020.107829.
[27] M. Tadeusiewicz, M. Ossowski, “A verification technique for multiple soft fault diagnosis of linear analog circuits”, Int. Journal of Electronic and Telecomunications, vol. 64, pp. 83-89, 2018. doi: 10.24425/118150.
[28] M. Tadeusiewicz, M. Ossowski, “Modeling analysis and diagnosis of analog circuits in z-domain”, J. Circ. Syst. Comput, vol. 29, no. 02, 2020. https://doi.org/10.1142/S0218126620500280
[29] G. Fedi, S. Manetti, M.C. Piccirilli, J. Starzyk, “Determination of an optimum set of testable components in the fault diagnosis of analog linear circuits”, IEEE Trans. Circ. Syst.-I, vol. 46, pp. 779-787, 1999. doi: 10.1109/81.774222
[30] S. Manetti, M.C. Piccirilli, “A singular-value decomposition approach for ambiguity group determination in analog circuits”, IEEE Trans. Circ. Syst.-I, vol. 50 pp. 477-487, 2003. doi: 10.1109/TCSI.2003.809811.
[31] S. Saeedi, S.H. Pishgar, M. Eslami, “Optimum test point selection method for analog fault dictionary techniques”, Analog Integr. Circuits Signal Processing., vol. 100, pp. 167-179, 2019. https://doi.org/10.1007/s10470-019-01453-7.
[32] X. Tang, A. Xu, R. Li, M. Zhu, J. Dai, “Simulation-based diagnostic model for automatic testability analysis of analog circuit”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems., vol. 37, pp. 1483-1493, 2018. https://doi.org/10.1109/TCAD.2017.2762647.
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Authors and Affiliations

Michał Tadeusiewicz
1
Marek Ossowski
1
Marek Korzybski
1

  1. Lodz University of Technology, Department of Electrical, Electronic, Computer and Control Engineering, Lodz, Poland
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Abstract

This paper is devoted to multiple soft fault diagnosis of analog nonlinear circuits. A two-stage algorithm is offered enabling us to locate the faulty circuit components and evaluate their values, considering the component tolerances. At first a preliminary diagnostic procedure is performed, under the assumption that the non-faulty components have nominal values, leading to approximate and tentative results. Then, they are corrected, taking into account the fact that the non-faulty components can assume arbitrary values within their tolerance ranges. This stage of the algorithm is carried out using the linear programming method. As a result some ranges are obtained including possible values of the faulty components. The proposed approach is illustrated with two numerical examples.

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Authors and Affiliations

Michał Tadeusiewicz
Stanisław Hałgas
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Abstract

The paper deals with fault diagnosis of nonlinear analogue integrated circuits. Soft spot short defects are analysed taking into account variations of the circuit parameters due to physical imperfections as well as self-heating of the chip. A method enabling to detect, locate and estimate the value of a spot defect has been developed. For this purpose an appropriate objective function was minimized using an optimization procedure based on the Fibonacci method. The proposed approach exploits DC measurements in the test phase, performed at a limited number of accessible points. For illustration three numerical examples are given.

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Authors and Affiliations

Michał Tadeusiewicz
Stanisław Hałgas
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Abstract

The paper deals with multiple soft fault diagnosis of analogue circuits. A method for diagnosis of linear circuits is developed, belonging to the class of the fault verification techniques. The method employs a measurement test performed in the frequency domain, leading to the nonlinear least squares problem. To solve this problem the Powell minimization method is applied. The diagnostic method is adapted to real circumstances, taking into account deviations of fault-free parameters and measurement uncertainty. Two examples of electronic circuits encountered in practice demonstrate that the method is efficient for diagnosis of middle-sized circuits. Although the method is dedicated to linear circuits it can be adapted to multiple soft fault diagnosis of nonlinear ones. It is illustrated by an example of a CMOS circuit designed in a sub-micrometre technology.
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Authors and Affiliations

Michał Tadeusiewicz
Stanisław Hałgas
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Abstract

This paper deals with multiple soft fault diagnosis of nonlinear analog circuits comprising bipolar transistors characterized by the Ebers-Moll model. Resistances of the circuit and beta forward factor of a transistor are considered as potentially faulty parameters. The proposed diagnostic method exploits a strongly nonlinear set of algebraic type equations, which may possess multiple solutions, and is capable of finding different sets of the parameters values which meet the diagnostic test. The equations are written on the basis of node analysis and include DC voltages measured at accessible nodes, as well as some measured currents. The unknown variables are node voltages and the parameters which are considered as potentially faulty. The number of these parameters is larger than the number of the accessible nodes. To solve the set of equations the block relaxation method is used with different assignments of the variables to the blocks. Next, the solutions are corrected using the Newton-Raphson algorithm. As a result, one or more sets of the parameters values which satisfy the diagnostic test are obtained. The proposed approach is illustrated with a numerical example.

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Authors and Affiliations

Michał Tadeusiewicz
Stanisław Hałgas

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