@ARTICLE{Węgrzyn_Mariusz_Tracing_2014,
 author={Węgrzyn, Mariusz and Sosnowski, Janusz},
 volume={vol. 60},
 number={No 1},
 journal={International Journal of Electronics and Telecommunications},
 howpublished={online},
 year={2014},
 publisher={Polish Academy of Sciences Committee of Electronics and Telecommunications},
 abstract={Abstract The paper presents the extent of fault effects in FPGA based systems and concentrates on transient faults (induced by single event upsets - SEUs) within the configuration memory of FPGA. An original method of detailed analysis of fault effect propagation is presented. It is targeted at microprocessor based FPGA systems using the developed fault injection technique. The fault injection is performed at HDL description level of the microprocessor using special simulators and developed supplementary programs. The proposed methodology is illustrated for soft PicoBlaze microprocessor running 3 programs. The presented results reveal some problems with fault handling at the software level.},
 title={Tracing Fault Effects in FPGA Systems},
 URL={http://www.czasopisma.pan.pl/Content/87545/PDF/12.pdf},
 doi={10.2478/eletel-2014-0012},
}